User I/O conflict with DCLK (Cyclone 3)

Ohh. The reason of error was found in handbook but is not wonderful :(

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DCLK Pad Placement Guidelines

There is a restriction on the proximity of selected I/O standard inputs and outputs to

the DCLK pin on QFP packages. The restriction is to minimize noise coupling from

neighboring I/Os to the DCLK pin, and is as follows:

If an I/O is using 3.0- or 3.3-V I/O standards, there must be one pad of separation

between the I/O and the DCLK for QFP packages.

The Quartus II software checks for this restriction.

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