Use different voltages on GPIO

You can't change it from Quartus, the VCCIO is the actual voltage applied by the board to the FPGA's VCCIO pins. Once it has been defined on the board level it can't be changed.

You can find an explanation of the I/O features here (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/stratix-iv/stx4_siv51006.pdf) and the datasheet with the voltage levels here (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/stratix-iv/stx4_siv54001.pdf). I don't know how your board is wired, but if there is a correct voltage on the Vref and Vtt pins, you may be able to use a SSTL standard. Another alternative could be to use LVDS, but as it is a differential standard output pins are always used as pairs, with one pin having the opposite voltage level than the other. Both solutions are hacks really, but it all depends on how the FPGA pins are connected on your board.