Honored Contributor
Honored ContributorComing back to a previous question:
--- Quote Start --- I am curious if anyone has consistently designed the JTAG header at VCC of 3.3V and had the FPGA successfully program time after time? With or without clamping diodes? --- Quote End --- The 2.5V JTAG supply suggestion has been newly introduced by Altera with Cyclone III, together with a bunch of "Watch your step" statements related to the danger of input overvoltage. Curiously, the overvoltage specification is nearly unchanged between Cyclone II and Cyclone III. The real device overvoltage capability has changed of course with the technology and in so far it's quite reaonable to look more thoroughly on some problems that existed since long. Overshoot of JTAG signals is mainly a matter of reasonable termination respectively transmission line impedance design, so you can achieve non-overshoot JTAG signals. As already discussed, clamp diodes are also an effective way. But a vendor suggestion need to consider different programming hardware, modified JTAG cables and different board routing. So I understand, why Altera promotes 2.5 V JTAG. It's your decision to follow or ignore the suggestion. Most JTAG circuits designed by my customers or myself are still using 3.3V. Only part of it (mostly industrial boards) is utilizing clamp diodes.
