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Altera_Forum's avatar
Altera_Forum
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12 years ago

USB & EMAC I/O options

Is it possible to route the HPS USB I/O signals through the FPGA instead of using the dedicated HPS pins? In 13.1 you can only select HPS I/O pin multiplexing for the USB controllers. I'm guessing ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

I am in the same situation, looking to route the PTP interface to the FPGA and keep the data interface to the HPS I/O.

According to the Cyclone V Handbook, chapter 17 EMAC:

  • figure 17-1 - EMAC System Integration

  • and table 17-4 - EMAC to FPGA IEEE1588 Timestamp Interface

  • and the various info in the document

we should be able to ONLY expose the timestamp interface (PTP clock, PPS output and AUX timestamp trigger) to the FPGA and keep the MAC interface to HSP I/O.

Hoping there is a way to do that :)

Could someone from Altera shed some lights on that?

Thanks