Forum Discussion
Altera_Forum
Honored Contributor
13 years agoMany thanks for the replies.
Michaels, unfortunately the interface between the FPGA and the processor is not via JTAG. You´re solution would be ideal, but unfortunately it won´t be possible for us to do it. Many thanks for your suggestion though. After doing some further study today, I think I am going to have a go at using only the ALTASMI_PARALLEL megafunction only to update the configuration in the EPCS. I will attempt to do the following to reconfigure the flash: 1) Perform a bulk erase of the EPCS64. 2) Begin writing at adress H'000000 in the EPCS the first 256 bytes (1 page) of the .rbf file. 3) Once the 1st page has been written, alter offset the address by +256 and begin writing the 2nd page in the EPCS. 4) Continue writing pages until the entire .rbf file has been successfully written to the EPCS. It would be great if someone could confirm if the above process will work or if I have misinterpreted something. Many thanks for the help.