Updating EPCS with new configuration via FPGA

The original post suggests, that the processor is not connected through JTAG rather than an application specific interface, e.g. a parallel or serial bus as in most FPGA systems incorporating an external processor.

In this case, ALTASMI_PARALLEL and optionally ALTREMOTE_UODATE is offering the functionality to program a serial configuration flash in FPGA user mode.

The configuration image size, which is also the rbf file size, is different in compressed and uncompressed mode. In uncompressed mode, it's always the maximum size for the specfic FPGA type that can be found in the device hnadbook. In compressed mode it's only the required size, varying with FPGA utilization.

If no advanced configuration schemes (e.g. multiple images for remote update) are used, the EPCS flash contains exactly the configuration bitstream to be send to the FPGA.