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Honored Contributor
Honored ContributorUnused CPLD Pins
I have two CPLDs on my PCB that connect to a common SPI bus. In order to keep things simple I'm trying to talk to only one of the chips at first but I'm having some trouble with the voltages which le...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Do I gain anything from explicitly writing this with d-flip flops (like you did in your ByteBlaster code) instead of a vector? I must be missing something important. --- Quote End --- The recommendation was more to start using components, rather than writing things inline. A synchronizer is a useful component. You can add generics to indicate how many stages of DFFs to use and whether to power-on high or low. When you start using components in your source, it also becomes easier to read, since you start to see the 'big-picture' rather than a huge number of VHDL signal names that have slight variations. Eg. The input spi_clk becomes spi_clk_sync once synchronized. Cheers, Dave
