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Your Baud rate is clearly not what you expect it to
be.In order for your FPGA to generate the correct baud rate you not only need to tell it the baud rate but the system clock frequency too. Are you setting this up 'as per the available literature'?
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Thanks for your response Alex.Since I am using standard UART library of QSYS which is sync'ed to my 50 MHz on board clock, so I think that baud rate issue should not be there.(Here is my source:
https://www.youtube.com/watch?v=yetvltb4hm4)
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Are you able to measure - e.g. with an oscilloscope - the resulting baud rate you have? This might give you a pointer as to what order of magnitude out you are.Cheers,Alex
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Moreover, I have grabbed a part of the serial bit stream on my scope and it can be seen that a pulse duration is 8.6 us which gives me ~115200 as baud rate for which my system is presently configured (i.e. both transmitter and receiver). Please locate the screen dump of scope here:
https://drive.google.com/file/d/0b9jlla6qcyb2ug5tbknjm3bxdlu/view?usp=sharing However, it can also be seen that Voltage of the transferred pulses is very small ~30mV peak-to-peak. Do you think this might be the issue in the decoding of erroneous data? Can you please suggest something else?Thanks
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