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Altera_Forum
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9 years ago

understanding avalon slave <-> master transfers

Hello, I am trying to understand how avalon slave <-> master read and writes are working, I have seen the master and slave templates and several manuals and sheets and posts about that but I am...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Based on the above I put together a simple two way set associative instruction cache with 4Kb internal memory and it works in the simulator with a simple test toplevel entity but now I need to check how I can simulate this after I set it up in a qsys system.