Forum Discussion
Altera_Forum
Honored Contributor
14 years agofirst of all - current_state is missing from the sensitivity list of the state machine process.
Secondly, you have created latches because left/right_pressed signals are not assigned values in all cases. This is also the case with the next_state signal. You HAVE to assign all signals in ALL cases in asynchronous processes to avoid latches. In this case, left_pressed is set to '1' at the start, but right_pressed stays at 'U' (uninitialised). '1' or 'U' gives '1', but when left_pressed goes to '0', '0' or 'U' gives 'U', hence the shift output. So the problems to fix: Assign next_state, left_pressed and right_presssed in ALL branches of the process. Or, to make it easier, use the single process state machine template instead of 2 processes. it is less prone to errors.