Forum Discussion
Altera_Forum
Honored Contributor
10 years agoUltimate OSS 2x GBIT NIC on Linux by PHY to FPGA on Cyclone V SoC DP0-Nano GPIO trd!
Hi, I want to plug in two gigabit ethenet transcievers to my DP0-Nano CYclone V SoC. The way to do this must be the GPIO:s. By this thread, I wish to clarify how to do this, preferab...
Altera_Forum
Honored Contributor
10 years agoI think you'll struggle to run 2 Gigabit Ethernet controllers, reliably, through the GPIO on the DE0-Nano-SoC Kit. No, I'm not aware of any modules that will simply plug onto the GPIO exposed.
I suggest, to aid your initial understanding of how the Phy should be connected up, you consider looking at the documentation for a dev board that already has two connected up. The cyclone v e fpga development kit (https://www.altera.com/products/boards_and_kits/dev-kits/altera/kit-cyclone-v-e.html) has two Marvell Gigabit Phys. They'll connect up exactly as you need. Look through the documentation, including the schematic. You can download all this via the links at the bottom of the page. Also look at the cyclone v soc development kit (https://www.altera.com/products/boards_and_kits/dev-kits/altera/kit-cyclone-v-soc.html). Perhaps this is more representative of the SoC solution you want. However, the dual Phys on this are only 100Mb. I hope this helps guide you, in the first instance, to a suitable hardware solution. Cheers, Alex