Altera_Forum
Honored Contributor
11 years agoTutorial: Creating a Nios II Project on DE0-Nano and Quartus II 14.1
Hi Everybody!
I'm trying to get my DE0-Nano board work. I'm using the terasic de0-nano user manual (http://www.altera.com/literature/ug/de0_nano_user_manual_v1.9.pdf) and Quartus II 14.1. Using Quartus 11.1sp2, the tutorial in the manual works. I'm getting confused trying to get it work with the actual version of Quartus - I hope this post will help others with this board! The Tutorial: Creating a Nios II Project starts in the manual on page 82... ...page 87 in the manual: select tools > sopc builder - since there is no more SOPC Builder available, we use Qsys(14.1)... I save the System File as: DE0_NANO_SOPC.qsys rename the clock... select processor (Nios II classic)... jtag_uart ... onchip_memory2... After updating the CPU-Settings for the memory vectors, I click "JTAG Debug Module" in the processor settings and select "Debug level: No Debugger". This makes some of the wires in Qsys (it seems that in SOPC Builder there was no manual wiring neccessary) disappear... (Attachment) Add pio_led... There is an Export column. I double click the entry after "conduit" -> pio_led_external_connection After wireing and Assigning Base Adresses: "The system cannot be generated when there are errors". Error is: DE0_NANO_SOPC.cpu Please choose an appropriate slave for the Break vector memory. The error disappears after assigning the break vector memory: onchip_memory2.s1 in cpu -> edit -> JTAG Debug Module Now Generation can be completed with warnings. After clicking Finish in Qsys, a window appears: "You have created an IP Variation in the file..." (Attatched .jpg) Back in Quartus and back in the manual (page 112) I open a new verilog HDL File, enter the code (on page 112) and save as "myfirst_niosii.v". Full of expectations I click processing -> start compilation to get the error: 12006 Node instance "DE0_NANO_SOPC_inst" instantiates undefined entity "DE0_NANO_SOPC" Right clicking files, the file de0_nano_sopc.qsys can be manually added to the project. Now processing -> start compilation results in the following errors: Error (12002): Port "clk_50" does not exist in macrofunction "DE0_NANO_SOPC_inst" Error (12002): Port "out_port_from_the_pio_led" does not exist in macrofunction "DE0_NANO_SOPC_inst" Error (12002): Port "reset_n" does not exist in macrofunction "DE0_NANO_SOPC_inst" Error: Quartus II 64-Bit Analysis & Synthesis was unsuccessful. 3 errors, 4 warnings Error: Peak virtual memory: 754 megabytes Error: Processing ended: Tue Dec 30 18:56:51 2014 Error: Elapsed time: 00:00:34 Error: Total CPU time (on all processors): 00:01:04 Error (293001): Quartus II Full Compilation was unsuccessful. 5 errors, 4 warnings Hope to get this baby to work! Cheers!!!