New Contributor
Frequent ContributorHi there,
Don’t worry~
Firstly, answer your question:
1. The nSTATUS just be derived to low after POR, then it goes back to high. In normal conditions nSTATUS follows nCONFIG. By the way, is there week pull up in your design?
And there are the points I don’t understand:
1. The rbf file is used to config the fpga or Flex?
2. Is these hardware setting has been checked?
3. Have we test the config file in the other type like sof?
New ContributorHello,
Thanks for your answer.
About nSTATUS, the behavior is as per your answer, a low pulse which is the image of nCONFIG slightly delayed so it goes high during the whole configuration process.
Sorry, by FPGA I mean the Flex, which I mistakenly called FPGA. But the Flex is not a true FPGA despite it has most of its characteristics.
1) Yes I use the .rbf file to configure the Flex.
2) What do you mean by "hardware setting has been checked"? Unless I missed something, the Flex is set up to be configured in passive serial (MSEL0&1 to GND, nCE to GND)
3) Not tested the SOF file as the content is quite different from that of .rbf file. As per my understanding the SOF file needs some conversion from an intelligent programmer, this is why my preference goes for .rbf, as it might be the exact binary image to send to the Flex.
New ContributorSorry about question 1) yes there is 1K pullup to VCC on nSTATUS and CONF_DONE.
