[Transceiver toolkit] Reference clock trouble

The Stratix V and Stratix IV has discrepancy in term of the transceiver architecture and IP. Thus, the IV's qsys and V's qsys can not be interchange. You could also download the transceiver toolkit design examples provided by Altera from https://www.altera.com/support/support-resources/design-examples/design-software/on-chip-debugging.html. Here you can find different design example for different devices and Quartus II version.