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Hence, the transmit buffer is not a simple CML source.
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Yes. What made you think, it would use unipolar current sources? It's not stated in the Altera documentation at any place.
The Altera documentation is suggesting a (differential) bipolar current source with programmable resistive termination. But I guess, you won't find implementation details. As with other FPGA OCT variants, there are most likely no physical resistors, just transistors. It's also not clear, if the PCML driver uses real current sources.
All you can rely on is the output voltage specification in the datasheet.
P.S.: Altera has filed patents related to FPGA IO structures. Particularly US2006220681 "Methods and Apparatus to DC Couple LVDS Driver to CML Level" may be interesting. US7855577 "Using a Single Buffer for Multiple I/O Standards" is also related to the topic.
A good place to search for patents and get the full text
http://worldwide.espacenet.com
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