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Altera_Forum
Honored Contributor
16 years agoTransceiver Pin Assignment Problem in Pin Planner for Stratix IV GX 230 FPGA
Hi, I am doing IO assignment analysis and Pin Planning check for one of our FPGA design. Design is having multiple high speed Tx/Rx serial link and other I/O standard requirement. To name a few ...
Altera_Forum
Honored Contributor
16 years agoHi,
Thanks for the prompt response. I didn't create GXB instance in my top level design. After instance creation, it has resolved the issue. Now, I/O check for all the pre-assigned transceiver pin is also passing alongwith successful Fitter run. Thanks again ! Rakesh