CStoe2New Contributor6 years agoTransceiver in Cyclone V using less then 614 Mbps Hi all, In a recent project I would like to use a camera with a clock of 290 MHz when using Double Data Rate. The throughput rate is therefore 580 Mbps per channel for a total of 10 channels. Now i...Show More
CheepinC_alteraRegular Contributor6 years agoHi Christian, Glad to hear that you have managed to get your design working. I will set this case to close-pending for now. Thank you.
Recent DiscussionsDifferent FPGA model shows: DEV-AGM039EAArria 10: Remote Update Factory Fallback won't work & Watchdog does not triggerVcm for the clock input pins of agilex5 E-series FPGA A5ED065BB32AE5SR0Can you Validate MAX10 Date and Lot Code?Part Status request