Transceiver arbitrary data rate

Hello ,

env: Quartus 18.1 Board: Arriav V 5AGXFA5H4F35C5

I try to input parallel data and output serial data. So I choose Native PHY IP for my design.

Because I want to let it operate lots of data rate 1Gbps~6Gbps (100 Mbps/step)

So I have a idea below:

"PLL IP" -> "TX PLL IP" -> "Native PHY IP"

I can change PLL output clock by adjusting M/N/C parameter.

TX PLL IP as I know it has fixed magnification.

Native PHY can use external TX PLL.

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So if I want to let Native PHY operate 1000Mbps.

PLL IP can output 100M Hz clock. And I can use 10x TX PLL.

So TX PLL can produce 1000M bps. And finally Native PHY can output 1000M bps data rate.

I am not sure if my thinking is right or not.

Thanks for help !!