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Altera_Forum
Honored Contributor
Honored ContributorTiming warnings...
Hi When I create sdc file for my project targeted on Stratix II30, am getting below warnings...
Can I neglect them? Warning: Node: pzdyqx:nabboc|pzdyqx_implzdyqx_impl_inst|MDCK2395:\stratixii_WCRO7487_gen_0:stratixii_WCRO7487_gen_1|CJQJ5354:AJQA6937|CLIA8751[18] was determined to be a clock but was found without an associated clock assignment. Warning: Node: pzdyqx:nabboc|pzdyqx_implzdyqx_impl_inst|MDCK2395:\stratixii_WCRO7487_gen_0:stratixii_WCRO7487_gen_1|EPEO2888_7 was determined to be a clock but was found without an associated clock assignment. Warning: Node: pzdyqx:nabboc|pzdyqx_implzdyqx_impl_inst|MDCK2395:\stratixii_WCRO7487_gen_0:stratixii_WCRO7487_gen_1|EPEO2888_6 was determined to be a clock but was found without an associated clock assignment. Warning: Node: pzdyqx:nabboc|pzdyqx_implzdyqx_impl_inst|MDCK2395:\stratixii_WCRO7487_gen_0:stratixii_WCRO7487_gen_1|EPEO2888_5 was determined to be a clock but was found without an associated clock assignment. Warning: Node: pzdyqx:nabboc|pzdyqx_implzdyqx_impl_inst|MDCK2395:\stratixii_WCRO7487_gen_0:stratixii_WCRO7487_gen_1|EPEO2888_4 was determined to be a clock but was found without an associated clock assignment. Warning: Node: pzdyqx:nabboc|pzdyqx_implzdyqx_impl_inst|MDCK2395:\stratixii_WCRO7487_gen_0:stratixii_WCRO7487_gen_1|EPEO2888_3 was determined to be a clock but was found without an associated clock assignment. Warning: Node: pzdyqx:nabboc|pzdyqx_implzdyqx_impl_inst|MDCK2395:\stratixii_WCRO7487_gen_0:stratixii_WCRO7487_gen_1|EPEO2888_2 was determined to be a clock but was found without an associated clock assignment. Warning: Node: pzdyqx:nabboc|pzdyqx_implzdyqx_impl_inst|MDCK2395:\stratixii_WCRO7487_gen_0:stratixii_WCRO7487_gen_1|EPEO2888_1 was determined to be a clock but was found without an associated clock assignment. Warning: Node: pzdyqx:nabboc|pzdyqx_implzdyqx_impl_inst|MDCK2395:\stratixii_WCRO7487_gen_0:stratixii_WCRO7487_gen_1|EPEO2888_0 was determined to be a clock but was found without an associated clock assignment. Thanks!!1 Reply
Altera_ForumAre you using OpenCore for IP? If these clocks are in the OpenCore logic (not in the IP itself or your design), then they won't exist in your final design after you compile with an IP license. If there are synchronous paths on these clocks, then the timing would matter for the OpenCore logic that enforces the timeout or requires you to keep the programmer tethered to the board, but I don't remember ever seeing documentation saying to constrain clocks like these. Application Note 320 says that "you can safely ignore" other kinds of warnings for nodes in the OpenCore logic.
