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Altera_Forum's avatar
Altera_Forum
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10 years ago

Timing requirements to a part of a circuit

Does anybody know how to set timing requirements to a part of a circuit? I mean there is a critical part of a circuit that needs frequency optimization, and it's not rational to apply frequency cons...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

I didn't mean to use max delay with multicycle constraint. I just thought it's possible to restrict a bottleneck without specifing clk frequency and multicycle constraint. So, will it work without set_multicycling_path commands?