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Altera_Forum's avatar
Altera_Forum
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10 years ago

Timing requirements to a part of a circuit

Does anybody know how to set timing requirements to a part of a circuit? I mean there is a critical part of a circuit that needs frequency optimization, and it's not rational to apply frequency cons...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

sorry I can't run projects now but a diagram and sdc will do.

Anyway I looked at the TA cookbook/figure 1-16 clock enable multicycle on page 1-25 and all registers are enabled(those into mult and those at mult outputs).

In such cases you can apply sdc command for enable only and you don't need to worry about each single register.

Are you looking at same design?