Forum Discussion
Altera_Forum
Honored Contributor
15 years agoTiming error when storing result in RAM blocks using In-System Memory Editor
Hi, My design consists of some mathematical calculations (multiplications, additions,...). I supply the input using a RAM block and am trying to store the output using another RAM block. I use ...
Altera_Forum
Honored Contributor
15 years agoYour post and mine were lost.
What I was implying is that your thoughts on clocking and multicycle are not right. As to the solution, I think you need first to word(identify) the problem. It could be your output will not cycle exactly or your computation logic is buggy. I will put timing as last culprit if at all, check rtl simulation to exclude timing.