Forum Discussion
Altera_Forum
Honored Contributor
14 years agoYour post and mine were lost.
What I was implying is that your thoughts on clocking and multicycle are not right. As to the solution, I think you need first to word(identify) the problem. It could be your output will not cycle exactly or your computation logic is buggy. I will put timing as last culprit if at all, check rtl simulation to exclude timing.