Altera_ForumHonored Contributor10 years agoTiming closure for LVDS ADC input and related logic Hello all, I am looking for some help trying to close the timing for a new design. I need to inferface a Cyclone V E A5 with an ADC (AD9484). The ADC digital output is synchronous SDR at a...Show More
Altera_ForumHonored Contributor10 years agoYou should use DCO+ and DCO- as the input clk of ALTLVDS_RX.
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