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Altera_Forum
Honored Contributor
10 years agoTiming analysis error: Modelsim error vsim-3039
I have an 8b counter for learning timing analysis. I have completed Fitter, Assember, Timequest and EDA Netlist without any error. I have added the sdc file to the Assignment. When I run the gate lev...
Altera_Forum
Honored Contributor
10 years agoThe error message imply that there are mixed HDL languages in the design files. You will need Modelsim SE to support mixed HDL.