Forum Discussion
Altera_Forum
Honored Contributor
15 years ago --- Quote Start --- set_instance_assignment -name SYNCHRONIZER_IDENTIFICATION "FORCED IF ASYNCHRONOUS" -to sync[0] --- Quote End --- It would be better to add (embed) this assignment in the HDL source itself, like Altera does in it's own IP. So if you re-use your code (and re-usability is what we need my friend) this is executed automatically! For Vhdl see: http://quartushelp.altera.com/10.0/mergedprojects/hdl/vhdl/vhdl_file_dir_attribute.htm For Verilog see: http://quartushelp.altera.com/10.0/mergedprojects/hdl/vlog/vlog_file_dir_attribute.htm