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Altera_Forum
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13 years ago

timequest alt_sqrt how to choose properly signals for multicycle

Dear All, I have in my design 2 ALT_SQRTs, which are working in time multiplex to relax the timing. The system clock is 40MHz. When I use the timequest to check for timing, of course it fails, bec...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

allright, I have to change the design. I see the point. Basically all the registers have to physically stop operation (using clkenable) and it is not enough to slow the data stream.... that of course has some consequencies in latency. if my SQRT has latency of 4 clock cycles, using the clock enable will result in latency twice higher because SQRT is not operational every second cycle...

interesting.

thanks