timequest alt_sqrt how to choose properly signals for multicycle

Multicycle is very poorly understood by us all and is recipe for failure. If you are not sure do timing model simulation not just functional simulation + STA;

Here is the scenario: If your clock is 160MHz (period = 6.25 ns) then it is not the propagation delay that decides multicycle but the edge you sample the data.

If indeed your data changes only every 2 clocks then you need also to make sure you sample two clocks after launch. If your data changes every say 10 clocks but you sample on immediate next clock edge after transition then it is multicycle of 1 not 10.

when you use enable to control launch and latch then that guarantees that you sample correctly for multicycle.

When you declare multicycle there two things that result:

1) STA is deconstrained, this is obvious

2) less obvious is that the fitter assumes your clock is indeed clk/multicycle and hence inserts delays at its pleasure such that data transition is only correct after MC clocks. While this may not violate timing it will disturb the logic at sampling point. We then lost track of logic by this additional delay.