Altera_Forum
Honored Contributor
14 years agothe usage of ALTMEMPHY
Hi:
I provided 100M clock to the pll_ref_clk according to the PLL setting,and reset the global_reset_n,there is a clock output at mem_clk port and mem_clk_n port after 6000ns.But the mem_cke is still keep down(the ctl_cke has been pull up and ctl_mem_clk_disable has been pull down).is there anyone knows the reason? thank you in advance!