Forum Discussion
Altera_Forum
Honored Contributor
18 years agoThe need for error correction codes
Hello, I'm working on digital design for the first time since college and I'm unclear on how much error correction is needed in FPGA/CPLD systems. Here's the situation: My design will s...
Altera_Forum
Honored Contributor
18 years agoThank you very much for your replies. I am relieved to hear that I won't need to expect errors in register transfers, although I should add that the "single event upsets" were my primary concern, but it looks like you guys consider this a very rare occurance.
So then just a couple more questions: First off, would you recommend a null statement for the "when others" cases? Also, I ran the timing analysis in both modes as suggested, and while there were no paths that failed, I am unclear on how margin to expect in minimum slack times. For instance, the "Fast model clock hold" minimum slack is only 0.397 ns. I am running a 20 MHz clock. Is this acceptable? I am attaching my code below in case anyone would care to take a look.
library ieee ;
use ieee.std_logic_1164.all;
use IEEE.std_logic_unsigned;
entity FPG_SYNC is
port( clk: in std_ulogic;
output: out std_logic_vector(11 downto 0) := "000000000000"
);
end FPG_SYNC;
-----------------------------------------------
architecture behv of FPG_SYNC is
signal counter: natural := 0;
signal outputenable: boolean := true;
signal state: std_logic_vector(3 downto 0) := "0000";
signal nextstate: std_logic_vector(3 downto 0) := "0001";
signal laststate: std_logic_vector(3 downto 0) := "0000";
begin
syncproc: process (clk) is
begin
if (clk'event and clk='1') then
counter <= (counter + 1);
case counter is
when 0 =>
outputenable <= true;
state <= nextstate;
when 2 =>
outputenable <= false;
when 15 =>
counter <= 0;
when others =>
null;
end case;
end if;
end process syncproc;
NScombproc: process(state) is
begin
case state is
when "0000" => -- "0000" is the reset state
nextstate <= "0001";
when "0001" =>
nextstate <= "0011";
when "0011" =>
nextstate <= "0010";
when "0010" =>
nextstate <= "0110";
when "0110" =>
nextstate <= "0111";
when "0111" =>
nextstate <= "0101";
when "0101" =>
nextstate <= "0100";
when "0100" =>
nextstate <= "1100";
when "1100" =>
nextstate <= "1101";
when "1101" =>
nextstate <= "1111";
when "1111" =>
nextstate <= "1110";
when "1110" =>
nextstate <= "1010";
when others =>
nextstate <= "0001";
end case;
end process NScombproc;
Outputcombproc: process(clk, state, outputenable) is
begin
if (clk'event and clk='1') then
if outputenable then
case state is
when "0000" =>
output <= "000000000000";
when "0001" =>
output <= "000000000001";
when "0011" =>
output <= "000000000010";
when "0010" =>
output <= "000000000100";
when "0110" =>
output <= "000000001000";
when "0111" =>
output <= "000000010000";
when "0101" =>
output <= "000000100000";
when "0100" =>
output <= "000001000000";
when "1100" =>
output <= "000010000000";
when "1101" =>
output <= "000100000000";
when "1111" =>
output <= "001000000000";
when "1110" =>
output <= "010000000000";
when "1010" =>
output <= "100000000000";
when others =>
null;
end case;
else output <= "000000000000";
end if;
end if;
end process Outputcombproc;
end behv;
Thanks again, Jon