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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

testbench output control, stupid question

Hi to all!

I have a quite stupid question, I think.

I have a testbench, where I force the output to the right result. If my code works how I expect, the output would be exactly equal to the one I expected, while if my code doesn't work, I will see red X on some parts or on all the output signal in ModelSim.

The stupid question is this: how could I do to have a std_logic signal which tells me the rightness of the output? I mean: for example a signal which is low when the output is right, high when the output goes to X

thank you http://www.edaboard.com/images/smiles/icon_wink.gif

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Are you forcing the output from the testbench or inside the entity?

    For the answer you want, add this to the testbench:

    error <= '1' when to_X01(forced_output) = 'X' else '0';

    the to_X01 function will mean 'U', 'W', 'Z' and '-' are converted to 'X' too.