system runs whilst debugging but not on its own

1 - Yes I am using a JTAG uart, although I did read about that issue already and have since removed all printf() statements. In any case my system does not hang, its only the SPI which does not run.

2 - If you mean by MSEL bit settings then yes. My cycIII MSEL(3..0) bits are configured as 0010. This is the active serial (standard) configuration. I have also made sure that the epcs device pins are manually connected and assigned within the pin map in quartusII. Are there any other settings I may have neglected to set here?

I was a little confused on what setting to use in the niosII core for reset vector address. It is set to onchip_mem with 0x0 offset. My understanding is that a bootloader resides within the epcs core which runs code to transfer its contents to the FPGA. Then it gives control to the niosII which runs from the location specified within the above mentioned niosII setting. Does this sound correct to you or have I made an error here?

3 - Within the niosII ide I have slected the heap section to reside within my DDRII memory, this is used for LCD screen buffers. All other niosII memory sections reside within onchip memory.

4 - I have not tried using the nios2-flash-programmer yet, I will certainly read up on that and try it soon.

Thanks Jake!

I'll let you know how it went.