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Altera_Forum's avatar
Altera_Forum
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12 years ago

System ID and Time Stamp Not Found

I have developed a hardware design with Nios II processor. I am using a cpu, a sys clk timer, an interval timer, jtag uart, system id, sdram and pios. I am using the DE0 board. I have used both Quart...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Hi migara8,

Would it be possible to attach your qsys file instead? The HDL instantiation hides the connections which is the only way to see what might be going on. Is there an example design for the DE0 board you can compare against?

Scott