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Altera_Forum
Honored Contributor
13 years agoSystem ID and Time Stamp Not Found
I have developed a hardware design with Nios II processor. I am using a cpu, a sys clk timer, an interval timer, jtag uart, system id, sdram and pios. I am using the DE0 board. I have used both Quart...
Altera_Forum
Honored Contributor
13 years agoHi migara8,
Whenever I've come across this, it's been because the JTAG UART is unable to communicate with the system for some reason. For me, it's typically been that some reset being asserted somewhere. If the SDRAM is interfering, it may be that it is holding bus access, preventing the UART from accessing the system ID. It would help if you can post your Qsys system but you can also try to track it by using SignalTap to monitor the bus. Scott