Honored Contributor
Honored ContributorHi Dave
This is what i have Cyclone V GX Starter Kit http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&no=830 I have a DUT that communicates via SPI protocol. We need a host interface to this to send the SPI command words (65K+ 32bit words) and collect the response from the DUT and transfer back to host PC for processing What i have done so far: qsys generated SPI core that works perfectly with our DUT. I can implement a subset of commands and the DUT responds correctly. small nios c program to format the instructions to spi and save response from DUT and store into 32bit words i have used the master_read_to_file over system console to read back these 32bit words back to host, analyze in matlab and it looks correct. i can use the master_write_from_file over system console to write my memory but it does interfere with the current nios mem polling/triggering, same goes for the master_write_memory What i need to do is take this small scale subset and scale up to met full transfer to/from DUT. So i need to move 65K+ (or more) 32bit instructions to memory (every once in a while, the instructions may change. so this process can be slower, but not snail pace) I liked your master_write_memory suggestion vs master_write_32. that sped things up to be around 10 seconds. this is acceptable if worst comes to worse, i can try to cram everything i need into a mem init hex file and load that at power up, but the formatting/checksum algorithm has kept me from trying this yet. besides, id rather be able to dynamically load new instructions as needed. the SPI transfer to DUT must be decently fast. im confident i can get that up to speed. right now, its slow because i was debugging the transfer and never sped it up. This SPI transfer will happen multiple times per test based on changing test conditions. So i envision nios code running in a loop and being triggered by the host after test conditions are set up. instructions in memory need not change every time and probably wont. but the captures need to be fast 1-2 seconds if possible Thats where im getting stuck. I really dont care how the SPI transfer gets initiated as long as its by the host pc and eventually controlled by sw. Everything but this triggering is working. Im open to suggestions. id rather learn to do this stuff correctly the first time than try to replicate bad design after bad design thanks!!
