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I see what you mean about the master_write_32 vs master_write_memory speed. wow. big difference!! thanks for that tip!!
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You're welcome!
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but, the other reason im writing back is that even though ive added the jtag avalon memory master, the nios still doesnt see whats written in the lpddr mem on my board.
Can you look at my qsys diagram and see if im missing something?
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Sure - why don't you screen shot it and post the image.
The image you posted in Post#3 connects the NIOS II instruction and data master to the LPDDR, so the processor should see the LPDDR at the address you have specified.
When you say that the NIOS II processor does not see the LPDDR, what are you using to read memory? Eg., are you using NIOS II code and printing to either a serial port or JTAG UART? If you are using SystemConsole to connect to the NIOS II JTAG connections, then I'm not sure what you're supposed to see, as I do not use those interfaces. The NIOS II IDE debugger should see the correct memory locations though.
Cheers,
Dave
Honored Contributor
