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Ive actually went ahead and abandoned the write_from_file idea. i put a gigantic for loop in my tcl script that loops over a ton of write_32 mem write
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You didn't read my Avalon Analysis document then?
https://www.ovro.caltech.edu/~dwh/correlator/pdf/altera_jtag_to_avalon_analysis.pdf master_read/write_memory are the most efficient routines. You could simply read a file into a Tcl variable and then use master_write_memory to write it. That is what I use (the master_read/write_file routines are new).
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that i thought for sure would be just as memory intensive as write_from_file and the nios code didnt lock up and triggered perfectly.
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There is nothing memory intensive about the JTAG interface. Its really slow. The JTAG clock is around 6MHz, and it takes about 10 clock periods per byte (the clock duty cycle is not 50-50). A 32-bit write packet involves a header, the address, and the write data, so its 10s of bytes. That means your Avalon-MM accesses are in the kHz rate. The NIOS processor and JTAG to Avalon-MM master have plenty of time to arbitrate and access a common slave memory device.
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so there has got to be a bug in that write from file that hoses mem.
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Yes, most likely. However, the bug may not be in the FPGA, it may be in the software on the PC.
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but, i dont have time to wait for altera right now, ive got to get this up and running so we can capture data from these DUTs. ill send what i have to altera. if they either correct me or fix a bug, ill post here
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I've given you a few suggestions, many of which I know work, so you should be able to get something working.
Cheers,
Dave
Honored Contributor
