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I see all the memory addresses. So i think thats good.
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Yes. Your memory map has only one set of addresses.
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Ive attached a screen shot of my qsys and mem settings. I believe im using the built-in avalon controller within the memory.
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Because that "master" is hidden within the memory controller, it can only see the memory addresses (most likely starting with an address of 0). I suspect that if you write with the JTAG memory master to address 0, then read with the NIOS processor from address 2000_0000h (the base address of the memory as viewed by the NIOS II processor) you will see the same data.
There is another component called the JTAG-to-Avalon-MM bridge. You can add that to the top-level design, and connect it just as you have done with the NIOS II processor. You can then use SystemConsole to access the memory map via that master.
I believe the NIOS II processor debug interface can also be used via SystemConsole, however, I have not used it. Its possible you can use that to read/write the memory map.
Personally, I think its "easier" to understand what is going on if you explicitly add the JTAG-to-Avalon-MM master to your design and use it to access the same addresses as the NIOS II master.
Here's some notes on the JTAG-to-Avalon-MM master ...
http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial Cheers,
Dave
Honored Contributor
