Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorSynthesis timing issues
Hi, Whenever the timing requirements are so high, it often happens that the removal of logic further decreases the fmax. For example in a project I need 400Mhz to achieve and somehow fmax just ...
Altera_ForumHonored Contributor
Honored ContributorBy removing logic, you may have created latches, which often lower fmax
