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I have read the TXCVR spec byte ordering section but still have some questions.
One thing I don't understand is the 9-bit pattern. Why is it 9-bits and not 10?
As an example, using the 8B/10B encoder on the RXCVR portion of the ALTGX configuration the default value for the ordering pattern is b'111111011 (is this a K word?). Does the pattern need to be code word to differentiate from data?
My interface to the TXCVR parallel connection to the fabric is 16-bits.
How does this pattern b'111111011 translates to the pattern that I need to send on the parallel interface, Tx_datain[15..8]= ????, Tx_datain[7..0]= ????
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I don't use the 10G features of the core, so I'm not sure. When I'm trying to learn how a core works, I setup a simulation and try different stimulus inputs to see how/why things work.
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The ALTGX will provide a signal rx_byteorderalignstatus to indicate when the pattern was found. The configuration also provides a pad pattern, should we use this pattern for anything (we already have the signal rx_byteorderalignstatus)? I am wondering why this is user configurable.
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You want to make sure the pad pattern is something that will be ignored by whatever protocol you are using. You don't want the pad pattern to be recognized as a synchronization code (whatever that happens to be).
Again, getting a simulation running can help answer a lot of these questions.
Cheers,
Dave
Honored Contributor
