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Honored Contributor
Honored ContributorSynchronizing two different clocks
I have two clocks coming to my FPGA through external source: 1) Fast clock 2) Slow clock. Internally, another clock is generated out of the fast clock through a divide by 10 counter. Now,...
Altera_ForumHonored Contributor
Honored ContributorYour idea is wrong by itself. First of all You don't want to use gated clocks - that's a bad idea. Secondly, what do You do with data, that You need to sync two clocks? Sounds like kind of mess...
