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Altera_Forum's avatar
Altera_Forum
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15 years ago

Synchronization problem in PWM generation

I am using the DE2 board to generate a 20 kHz PWM signal. The duty ratio is constant 20%. The device is implemented by verilog. My method is to use DE2 board to generate a 20 kHz * 1000 = 20 MHz cloc...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Thank you very much!

It works, although I do not understand why....