Altera_ForumHonored Contributor14 years agoSuggestions for simple link between two FPGAs? I need to transfer about 100 bytes of data between two Cyclone IV GX FPGAs on two different PCBs. The PCBs are pretty close (less than 6 inches/15 cm) and the hardware hasn't been designed yet, but I...Show More
Altera_ForumHonored Contributor14 years agoI said 10 MByte/sec, not 10 Mbit/sec, so my skew margin is 5nsec
Recent DiscussionsAGRW027R28A2I2V Thermal ModelWhy does PTA show zero W for F-tiles in Hierarchical Design EditorArria 10: Remote Update Factory Fallback won't work & Watchdog does not triggerWorst-Case Completion Time for PLL Dynamic Phase Shift (PHASESTEP → PHASEDONE)Cannot access SSLC portal for Questa License