Suggestions for simple link between two FPGAs?

Yes, clock skew and ESD are concerns, but there are impedance and frequency response controlled board to board interconnects that would make it a very sensible approach even without clock/data multiplexing and the possibility for skew. But usually at high enough rates one would just encode the data and clock and do a logic based CDR to avoid skew problems, or do some kind of synchronization / compensation anyway.

But for a mere 6" path @ 100 MHz you could have something that is every bit as good as a "on board" connection just by using the right board to board connectors with proper signal integrity / impedance / frequency response. For all I know you might just use a male/female PCB mount header or something to plug the boards together which would be better than even what one would consider a "backplane interconnect" to provide. Or FFC as is used with LCD LVDS or a couple SMB micro coax links or whatever. There are lots of good quanity short distance options that will not skew your signals by 50ns if you do use a clk and data distinct set @ 100Mhz.

Anyway it doesn't matter much, if 10Mhz will work for you, use 10 or 20, less EMC, less timing worries, etc.

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Two LVDS pairs (clock pair and data pair) is a sensible hardware solution, but at say 100MHz the interconnects would have to be carefully designed to meet clock skew, even over 6 inches.

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