Forum Discussion
Altera_Forum
Honored Contributor
14 years agoTwo LVDS pairs (clock pair and data pair) is a sensible hardware solution, but at say 100MHz the interconnects would have to be carefully designed to meet clock skew, even over 6 inches.
Two LVDS pairs (clock pair and data pair) is a sensible hardware solution, but at say 100MHz the interconnects would have to be carefully designed to meet clock skew, even over 6 inches.