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Ajay_Khedekar's avatar
Ajay_Khedekar
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2 years ago
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Sub -LVDS IO standard

Hello , I have one image sensor with 20 lane Sub-LVDS output (16 lane data and 4 lane clock) with following dc characteristics Symbol Description Min. Typical Max Condition ...
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  • Ajay_Khedekar's avatar
    Ajay_Khedekar
    2 years ago

    Hello guys,

    I really appreciate the your efforts.
    From your suggestions, i could make the conclusion that to interface the sub LVDS i need to check the IO receiver standard specifically i need check the VICM range along with receiver swing range. Also we need to careful about choosing the DDR LVDS receiver speed as well.


Ajay_Khedekar's avatar
Ajay_Khedekar
Icon for New Contributor rankNew Contributor
2 years ago

hello there ,

Thank you very much for your response!
accept my apologies to not providing clock details , here are the clock details,
"Synchronous serial output with sub-LVDS levels

16 data lanes with 4 clock lanes (total of 20 lanes, 10 for even rows and 10 for odd rows)

data transfer rate: 1100 Mbps for maximum frame rate

DDR clock for synchronization at 550 MHz"

Could you please enlighten me little about selecting sub LVDS receiver
dont we need to check about differential voltage swing ? as i mentioned my data have output swing can be 0.262V to 0.54V
i went through different data available on google about subLVDS i can see there receiver input threshold are there could you please explain how they work ?