Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Struggling with LVDS.

Hi Guys, I've had experience with FPGAs in the past, however I've never before been required to implement the LVDS standard for data communication. I thought it would be trivially easy, but it ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

That's a great way of explaining it.

I'll try and create a testbench for my 6-bit wide ALTDDIO_OUT component and check out how it works.

So, just to check, these ALTDDIO functions require an input clock. Is it possible to drive the clock for the component from an external LVDS signal?

Thanks a lot for your help. Super-fast response!