stratx IV configuration time reduction!!

HI

im looking to reduce configuration time in AS mode using SIVGX180 device & a serial flash. i cannot use CPLD or CPU for the configuration.

the problem is that altera states that the DCLK serial clock to the flash is between 17 & 40 Mhz. that leaves worst case scenario of 17Mhz & a conf. time that is too long.

is there a way to enter an external clock to the flash & FPGA? is there a way to ensure the 40Mhz clock?

is there another way for conf. without the use of MAXII or CPU?

THNX