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Altera_Forum's avatar
Altera_Forum
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12 years ago

Stratix V "CLKUSR"-Pin

Hi !

Maybe you can help me to get it right :)

I found this in stratix 5 handbook:

"The CLKUSR pin provides you with the flexibility to synchronize initialization of multiple devices or to

delay initialization."

So i can supply the "CLKUSR"-pin with a external clk-signal and this clk will be used to synchronize both fpga's?

Where can i get more information about the "CLKUSR"-pin?? (working through some .pdf's but without finding much information at the moment)

thanks in advance

heiko

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    12 years ago

    --- Quote Start ---

    Hi !

    So i can supply the "CLKUSR"-pin with a external clk-signal and this clk will be used to synchronize both fpga's?

    --- Quote End ---

    Yes, you can synchronize initialization of multiple FPGAs, which means that they will start working simultaneously.

    Additional info (albeit scarce) is provided by pin connection guidelines (http://www.altera.com/literature/dp/stratix-v/pcg-01011.pdf) PDF.