Forum Discussion
Altera_Forum
Honored Contributor
13 years agoHi Socrates,
How could this have an influence? And how can I check this? I would say that the input clock is not to slow, because I can get the desired frequencies (however on the wrong output). I've also kicked out the reconfig PLL and used a "non-reconfig" PLL. Everything worked just fine and I had no trouble with the frequencies (with the same input frequency; 5.25 MHz).