Stratix III DPA lock behaviour

I didn't use Stratix III, about Stratix II and Arria DPA I know this: DPA can only work , if the input signal has edges. If this isn't guaranteed, the DPA operation should be halted. For an undriven LVDS input, the locked signal is meaningless, but not necessarily zero. I don't expect, that Stratix III is behaving basically different.

The Stratix III handbook tells:

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The rx_dpa_locked signal only indicates an initial DPA lock condition to the optimum phase after power up or reset. You must not use the rx_dpa_locked signal to validate the integrity of the LVDS link.

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With a real input signal, I always experienced a considerable lock time. The handbook specifies an upper limit.